With the advance of the integrated circuits technology, the DRAM devices are widely applied in integrated circuits. In generally, A DRAM device comprises many memory cells, and each memory cell typically consists of a storage capacitor and an access transistor for storing each bit by the semiconductor DRAM. Either the source or drain of the transistor is connected to one terminal of the capacitor. The other side of the transistor and the transistor gate are connected to external connection lines such as bit lines and word lines, respectively. The other terminal of the capacitor is connected to a reference voltage. Thus, the formation of a DRAM memory cell comprises the formation of a transistor, a capacitor and contacts to external circuits. The digital data is stored in the capacitors and accessed by the MOSFETs, bit lines, and word lines arrays by connecting electrically the capacitors and the sources of the transistors.
However, with the coming of Ultra Large Scale Integrated (ULSI) DRAM devices, the sizes of memory cells have gotten smaller and smaller such that the area available for a single memory cell has become very small. This causes reduction in capacitor area, resulting in the reduction of cell capacitance. Accordingly, for the memory cells in DRAM devices, the most important issue currently is how to promote the storage ability and operation stability of capacitors when the scales of devices still decreases and the integration increases. Thus, the susceptibility of capacitors due to a particle radiation and soft errors is lowered, and the increasing refresh frequency is improved.
For solving the issues above, the prior art approaches to overcome these problems have resulted in the development of the various types of capacitors, such as the trench capacitor and the stacked capacitor. However, The manufacture of the stacked capacitor causes difficulties due to the limitation of the lithography technique. Besides, enormous stacked structures for promoting storage capacity usually cause the crack of the stacked structure occurring due to the unequally stress. On the other hand, the storing capacity of trench capacitor can not be promoted effectively due to the scale of trench capacitor is restricted. In additional, the punch through leakage is also an important issue for manufacturing the trench capacitors with the scale of trench capacitor smaller than micrometer.